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SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
3.4.1
3.4.2
Boot Modes
The device DSP supports the following boot modes in the following device order: NOR Flash, NAND
Flash, SPI 16-bit EEPROM, SPI 24-bit Flash, I2C EEPROM, and MMC/SD card. The boot mode is
determined by checking for a valid boot signature on each supported boot device. The first boot device
with a valid boot signature will be used to load and execute the user code. If none of the supported boot
devices have a valid boot signature, the Bootloader goes into an endless loop checking the USB boot
mode and the device must be reset to look for another valid boot image in the supported boot modes.
Note: For detailed information on MMC/SD and USB boot modes, contact your local sales representative.
Boot Configuration
After reset, the on-chip Bootloader programs the system clock generator based on the input clock selected
via the CLK_SEL pin. If CLK_SEL = 0, the Bootloader programs the system clock generator and sets the
system clock to 12.288 MHz (multiply the 32.768-KHz RTC oscillator clock by 375). If CLK_SEL = 1, the
Bootloader bypasses the system clock generator altogether and the system clock is driven by the CLKIN
pin.
Note:
?
?
When CLK_SEL =1, the CLKIN frequency is expected to be 11.2896 MHz, 12.0 MHz, or 12.288 MHz.
The on-chip Bootloader allows for DSP registers to be configured during the boot process. However,
this feature must not be used to change the output frequency of the system clock generator during the
boot process. Timer0 is also used by the bootloader to allow for 200 ms of BG_CAP settling time. The
bootloader register modification feature must not modify the Timer0 registers.
After hardware reset, the DSP boots via the bootloader code in ROM. During the boot process, the
bootloader queries each peripheral to determine if it can boot from that peripheral. At that time, the
individual peripheral clocks will be enabled for the query and then disabled when the bootloader is finished
with the peripheral. By the time the bootloader releases control to the user code, all peripheral clocks will
be "off" and all domains in the ICR, except the CPU domain, will be idled.
3.4.3
DSP Resources Used By the Bootloader
The Bootloader uses SARAM block 31 for the storing of temporary data. This block of memory is reserved
during the boot process. However, after the boot process is complete, it can be used by the user
application.
56
Device Configuration
Product Folder Links: TMS320C5515
Copyright ? 2010–2013, Texas Instruments Incorporated
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